It is known in the information handling system (computer) art to which this invention particularly pertains that the failure of a chip usually occurs during the initial phase of the chip's life. To test such components, a "burn-in" process is employed in which the chip is heated to high temperatures (greater than it would encounter during its life) and also electrically coupled to a test circuit or the like in which electrical current is passed through the chip. In one example, the chip may be heated in an oven established at an elevated temperature for a prolonged period, during or following which the chip is electrically coupled to a test circuit, e.g. , such as found on a printed circuit board, and current applied. If the chip passes this testing, it is usually then mounted on and electrically coupled to an associated substrate such as a printed circuit board or ceramic substrate, both having circuitry on an upper surface thereof as well as possibly located internally. Often, more than one chip is mounted on a singular substrate, depending of course on the operational requirements of the information handling system which will utilize this assembly. Those assemblies with only one chip are often referred to in the industry as single chip modules while those with more than one chip are often referred to as multi-chip modules. It is understood that the present invention is adaptable for use with both types.
Various types of testing devices for testing semiconductors, semiconductor chip modules, and other electronic components are illustrated in Letters U.S. Pat. Nos. 5,090,118 (Kwon et al), 5,175,491 (Ewers), 5,225,037 (Elder et al), 5,249,972 (Walker), 5,273,441 (Volz et al) and German Offenlegungsschrift DE42 23 658 (von-Samson-Himmelstjerna et al), the latter describing the use of dendritic elements on a TAB (tape automated bonding) tape to connect this to the chip's contacts.
Various disadvantages of the aforementioned and other devices currently in use include complexity of structure, difficulty in assuring positive coupling between chip and associated circuitry providing the testing current, and in providing structure which facilitates ready separation of the chip (and perhaps its underlying substrate if in module form) following completion of the testing. The latter capability is particularly desired, especially to assure a module structure which can then be readily incorporated into the final system designed to utilize said structure.
It is believed, therefore, that a test apparatus for testing electronic components utilizing one or more semiconductor chips which can assure positive connection between the component and the test circuitry in addition to being readily separable to assure quick and repeated component separation from the test apparatus would constitute a significant advancement in the art. It is further believed that a method for testing chip components which provides such advantages would also constitute a significant art advancement.
It will be understood from the following that the invention is not solely limited to testing semiconductor chips but may be adaptable for use in testing a variety of circuitized substrates other than chips, examples being the aforementioned ceramic substrates, multi-layered circuit boards, etc.